A. Field of the Invention
The present invention relates to a semiconductor apparatus including a vertical semiconductor device and a lateral semiconductor device formed on a substrate, a part thereof having a SOI structure (hereinafter referred to as a “partial SOI substrate”). The present invention relates also to the method of manufacturing the semiconductor apparatus having the structure as described above.
B. Description of the Related Art
FIG. 22 is a block diagram of a synchronous commutator circuit. The synchronous commutator circuit shown in FIG. 22 supplies electric power to CPU 110 in a computer. High-side MOSFET 101 and low-side MOSFET 102 are connected in series to each other. LC filter 112 formed of coil 107 and capacitor 108 is connected to the connection point of MOSFETs 101 and 102 such that connection point 111 of coil 107 and capacitor 108 is an output point. Free wheel diodes 103 and 104, battery 105, smoothing capacitor 106, control IC 109 and CPU 110 are shown in FIG. 22.
The operations of this synchronous commutator circuit are described below. A certain voltage, e.g. around 12 V, is applied between the drain of high-side MOSFET 101 and the source of low-side MOSFET 102 from battery 105, or other DC power supply. By switching on and off high-side MOSFET 101 and low-side MOSFET 102 alternately at a high frequency (from 500 kHz to 1 MHz), a DC voltage, e.g. around 5 V, is supplied to CPU 110 via LC filter 112, the resonance frequency of which is from 50 kHz to 100 kHz.
The DC voltage becomes higher as the ON-period of high-side MOSFET 101 is longer (as the ON-period of low-side MOSFET 102 is shorter). The DC voltage becomes lower as the ON-period of high-side MOSFET 101 is shorter (as the ON-period of low-side MOSFET 102 is longer). In other words, for supplying a predetermined voltage to CPU 110, it is necessary to set the ON- and OFF-periods of high-side MOSFET 101 and low-side MOSFET 102 at the respective predetermined values. When the ON-period of high-side MOSFET 101 is long, it is necessary to provide high-side MOSFET 101 with a high current capacity. When the ON-period of low-side MOSFET 102 is long, it is necessary to provide low-side MOSFET 102 with a high current capacity. The current that flows through low-side MOSFET 102 flows from its source to its drain, that is in the same direction with the current flow direction (upward in FIG. 22) in free wheel diode 104 connected in opposite parallel to low-side MOSFET 102.
The package, which houses a semiconductor chip mounting high-side MOSFET 101 thereon and a semiconductor chip mounting low-side MOSFET 102 thereon, occupies a large space. To obviate this problem, the package size is reduced by providing high-side MOSFET 101 and low-side MOSFET 102 with respective lateral planar structures and by integrating lateral planar MOSFETs 101 and 102 on the same semiconductor substrate (that is, into one chip) employing the IC techniques and the LSI techniques. However, when MOSFETs 101 and 102 are integrated into one chip, it is necessary to separate MOSFETs 101 and 102 from each other by a device separation region, e.g., an insulating separation region that separates MOSFETs 101 and 102 from each other by an insulator film. The device separation region causes a wide chip area. To narrow the chip area, it may be effective to use a vertical device for the high-side device, corresponding to high-side MOSFET 101, or for the low-side device, corresponding to low-side MOSFET 102.
Alternatively, a method has been disclosed that uses a partial SOI substrate, forms a lateral MOSFET in an area in which an oxide film is formed, and forms a vertical MOSFET in an area in which an oxide film is not formed (cf. JP P Hei. 11 (1999)-204541 A). The method disclosed in the JP P Hei. 11 (1999)-204541 A uses the oxide film in the partial SOI substrate for electrically separating the vertical device and the lateral device from each other. In the disclosed method, the depletion layers for sustaining the breakdown voltage are designed to expand almost throughout the semiconductor section except the insulator film. Due to this design, the impurity concentrations in the drift regions formed in the semiconductor section are set to be low to expand the depletion layers sufficiently. Due to the low impurity concentrations in the drift regions, the ON-resistance and the ON-voltage of each constituent semiconductor device are high. For reducing the ON-voltages, it is necessary to expand the active regions of the devices. In the structure as described, a device separation region and a large active region are necessary to secure a certain breakdown voltage and to reduce the ON-resistance. The device separation region and the large active regions cause a large semiconductor chip.
In view of the foregoing, it would be desirable to obviate the problems described above. It would be desirable to provide a semiconductor apparatus that includes a vertical device and a lateral device formed on the same semiconductor substrate that facilitates securing a predetermined breakdown voltage and reducing the semiconductor chip size. It would be also desirable to provide the method of manufacturing the desirable semiconductor apparatus described above.
The present invention is directed to overcoming or at least reducing the effects of one or more of the problems set forth above.